基于深度学习的集成电路缺陷智能检测技术研究
集成电路应用
聂玉婷,郜鹏
焦作师范高等专科学校
摘要： 集成电路制造工艺精密，缺陷类型复杂多样，传统检测方法存在效率低与泛化能力弱等瓶颈，难以适应先进制程的实时质控需求。针对上述问题，该文提出了一种基于改进卷积神经网络的集成电路缺陷智能检测方法：以ResNet50为主干骨架，在第三、第四残差块输出端嵌入CBAM通道注意力模块(压缩比r=16)；颈部网络构建三层BiFPN双向特征金字塔(P3/P4/P5，加权迭代两次)；采用几何变换、光度变换与CutMix组成的三阶MDA混合数据增强策略缓解样本不均衡；并通过结构化通道剪枝与INT8量化感知训练实现边缘端轻量化部署。在公开晶圆缺陷数据集上，该方法检测准确率达98.6%，F1值达97.9%，GPU端单张推理时间约15 ms，各指标均优于主流对比方法。
中图分类号：TN40文献标识码：ADOI:10.19339/j.issn.1674-2583.2026.07.004
中文引用格式：聂玉婷,郜鹏. 基于深度学习的集成电路缺陷智能检测技术研究［J］.集成电路应用，2026，43（7）：20-23.
英文引用格式：Nie Yuting, Gao Peng. Research on intelligent defect detection technology for integrated circuits based on deep learning［J］.Application of IC，2026，43（7）：20-23.
中文引用格式：聂玉婷,郜鹏. 基于深度学习的集成电路缺陷智能检测技术研究［J］.集成电路应用，2026，43（7）：20-23.
英文引用格式：Nie Yuting, Gao Peng. Research on intelligent defect detection technology for integrated circuits based on deep learning［J］.Application of IC，2026，43（7）：20-23.
Research on intelligent defect detection technology for integrated circuits based on deep learning
Nie Yuting, Gao Peng
Jiaozuo Normal College
Abstract： Integrated circuit manufacturing features sophisticated processes and complex as well as diverse defect types. Conventional detection methods suffer from bottlenecks including low efficiency and poor generalization capability, which renders them incapable of meeting real-time quality control requirements for advanced manufacturing processes. To address the above issues, this paper proposes an intelligent integrated circuit defect detection method based on a modified convolutional neural network. ResNet-50 was adopted as the backbone network, and CBAM channel attention modules (compression ratio r=16) were embedded at the outputs of the 3rd and 4th residual blocks. A three-layer BiFPN bidirectional feature pyramid (P3/P4/P5, two weighted iterations) was constructed for the neck network. A three-order MDA mixed data augmentation strategy consisting of geometric transformation, photometric transformation and CutMix was employed to mitigate sample imbalance.
Key words : deep learning; integrated circuits; defect detection; convolutional neural network; attention mechanism
引言
集成电路良率管控是半导体制造的核心环节，划痕、桥接与开路等微小缺陷若未及时识别将直接导致芯片功能失效乃至批量报废。随着制程特征尺寸进入7 nm以下节点，缺陷趋于微纳化，传统人工目检受限于主观判断与效率瓶颈，规则驱动的机器视觉方法对多类型缺陷的泛化适应性严重不足，均无法满足产线实时检测需求。深度学习(Deep Learning，DL)凭借端到端特征自动提取与强泛化能力，为集成电路缺陷检测提供了切实可行的技术方向。然而，缺陷样本稀缺、类间特征差异细微及边缘端算力受限等挑战仍制约工程落地，文章聚焦模型精度提升、小样本适应与轻量化部署三个维度展开系统研究。
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作者信息：
聂玉婷,郜鹏
（焦作师范高等专科学校,河南焦作454000）
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